In some applications for the fabrication of integrated circuits, it may be desirable to form stepped oxide on a substrate. For a LDMOS device, for example, it is advantageous if the dielectric of a gate electrode, the gate oxide, has a lower thickness on the source side than on the drain side, so that a stepped gate oxide is formed. This stepped gate oxide meets the demands for a lower turn-on resistance, i.e. a gate oxide as thin as possible, and for a high electrical strength, i.e. a gate oxide as thick as possible.
In the prior art, the forming methods are already known and described as so called dual gate oxide process in which after the deposition of a conventional gate oxide on a substrate using one mask several times etch to the deposited oxide using several more mask is required, so this method is not cost effective. Another disadvantage of the stepped gate oxide formed in this way is that the gate oxide could not be thick enough to withstand higher voltage, generally, the gate oxide thickness is only about 1000 angstroms and the performance of the entire device could be affected.
In light of foregoing, there is a need in the art to provide a better method for forming a stepped oxide on a substrate.